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 LIN D O C #: 1670
LX1670
5 - B I T P R O G R A M M A B L E V O L TA G E R E F E R E N C E
T
HE
I
NFINITE
P
OWER
OF
I
N N O VAT I O N
P
RODUCTION
D
ATA
S
HEET
DESCRIPTION The LX1670 is a complete precision reference and voltage monitor circuit for the Intel Pentium(R) Pro Processor and other high-end microprocessor supplies. It is designed for use in conjunction with the LX1660/1661 PWM controller. The LX1670 reads a 5-bit voltage identification (VID) code from the microprocessor and sets the output voltage reference to be used by the LX1660/61 controller. Together, they convert +5 or 12V input power to an adjustable output ranging from 1.8VDC to 3.5VDC in 100mV steps (50mV steps below 2.1V) with 1% DC system accuracy.
p p p p p
K E Y F E AT U R E S
1% TOTAL OUTPUT ERROR POWER GOOD, UV, 0V COMPARATORS 0V COMPARATOR HAS SCR DRIVE UNDER-VOLTAGE LOCKOUT CAPABILITY 5-BIT INPUT FOR ADVANCED PENTIUM PRO PROCESSOR APPLICATIONS (5 TH BIT IS FOR AUTOMATIC GAIN AND OFFSET SCALING) p IMPLEMENTS 1% DC ACCURATE CONTROL SYSTEM p 14-PIN NARROW BODY SOIC PACKAGE
PRODUCT HIGHLIGHT
A P P L I C AT I O N S
s PENTIUM II & PENTIUM PRO VOLTAGE REGULATOR MODULES s PROGRAMMABLE POWER SUPPLIES s VOLTAGE REFERENCE s ADVANCED MICROPROCESSOR SUPPLIES
T Y P I C A L AP P L I C AT I O N
VCC
OF THE
LX1670
5-Bit Digital Input Word
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 Enable Blank Enable
D0 D1 D2 D3 D4 ENABLE BLKEN GND
VCC VIDO To PWM Error Amplifier SCR Drive
LX1670
OVOUT PGOOD
Power Good
VSENSE System Output Voltage
PA C K A G E O R D E R I N F O TA (C) 0 to 70
D Plastic SOIC 14-pin
LX1670CD
Note: All surface-mount packages are available in Tape & Reel. Append the letter "T" to part number. (i.e. LX1670CDT)
F O R F U R T H E R I N F O R M AT I O N C A L L ( 7 1 4 ) 8 9 8 - 8 1 2 1
Copyright (c) 1997 Rev. 1.0 7/97
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841
1
PRODUCT DATABOOK 1996/1997
LX1670
5 - B I T P R O G R A M M A B L E V O L TA G E R E F E R E N C E
P
RODUCTION
D
ATA
S
HEET
A B S O L U T E M A X I M U M R AT I N G S
(Note 1)
PACKAGE PIN OUTS
Supply Voltage (VCC) .................................................................................... -0.3V to +15V PGOOD, D0-D3, D4, ENABLE, BLKEN ....................................................... -0.3V to VCC+0.3 VIDO, OVOUT, V SENSE ....................................................................................... -0.3V to +5V OVOUT ........................................................................................................................ -35mA VIDO ........................................................................................................................... -5mA Operating Junction Temperature Plastic (D Package) ............................................................................................... 150C Storage Temperature Range .................................................................... -65C to +150C Lead Temperature (Soldering, 10 Seconds) ............................................................. 300C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Pin numbers refer to DIL packages only.
VIDO VSENSE PGOOD OV OUT ENABLE BLKEN GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC D4B D4 D3 D2 D1 D0
D PACKAGE (Top View)
T H E R M A L D ATA
D PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA 120C/W
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow
2
Copyright (c) 1997 Rev. 1.0 7/97
PRODUCT DATABOOK 1996/1997
LX1670
5 - B I T P R O G R A M M A B L E V O L TA G E R E F E R E N C E
P
RODUCTION
D
ATA
S
HEET
ELECTRICAL
CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for LX1670C with 0C TA 70C ; 10.8V < VCC < 13.2V, D0-D3 = Open, D4 = Open, ENABLE = 1, BLKEN = 1. Nominal conditions: VCC = 12.0V, T = 25C. Currents flowing into chip are positive. Current maximums are currents with the highest possible value.)
Parameter
Symbol
Test Conditions
Min.
LX1670 Typ.
5
Max.
Units
Power Supply Current and Power Section
Positive 12V Supply Current ICC VSPA VSTP All outputs, inputs unloaded D0-D3 = X, D4 = Open, 2.00 VIDO 3.50V D0-D3 = X, D4 = GND, 1.80 VIDO 2.05V D4 = Open D4 = GND Binary, D0 = LSB, D3 = MSB IGOOD = 5mA VCC = 5V, Supply ramping down VCC = 5V, Supply ramping up -1.0 -1.5 100 50 mA 1.0 1.5 % % mV mV
Digital-to-Analog Converter Section
Voltage Set Point Accuracy LSB Coding
(Includes DAC, I-V Converter and output scaling amplifier. RLOAD > 1k, CLOAD < 100pF)
Under-Voltage Lockout Section
Power-up Reset Threshold Hysteresis Percent of VIDO Threshold PGOOD Low Voltage Percent of VIDO Threshold OVP Sourcing Current OVP Output Low VRES UVLOT UVLOH UOVTH VLG OVPTH IOVP VLOVP VIL VIH IIL IIH
(D0-D3, D4)
4.27
4.37 50 7 0.2 15
1.0 4.47
V V mV % V % mA mV V V A A A V
Under/Over-Voltage Comparator Section
5.5 IGOOD = 5mA 10 -20 8.5 0.4 20 100 0.8 2.0 VIL = 0.8V VIH = 2.0V Pin Ground Pin Open -10 0 -37.5 2.0
Over-Voltage Protection Comparator Section
OVP = 3.0V IOVP = 100A
TTL Inputs Section
Input Low Voltage Input High Voltage Input Low Current Input High Current
Open Drain Inputs Section
Input Low Current Input High Voltage
IIL VIH
Copyright (c) 1997 Rev. 1.0 7/97
3
PRODUCT DATABOOK 1996/1997
LX1670
5 - B I T P R O G R A M M A B L E V O L TA G E R E F E R E N C E
P
RODUCTION
D
ATA
S
HEET
F U N C T I O N TA B L E S
Table 1 - Input vs. Output Functions
VCC < 1.0 1.0 < VCC < UVLOT VCC > UVLOT VCC > UVLOT VCC > UVLOT VCC > UVLOT VCC > UVLOT VCC > UVLOT VCC > UVLOT VCC > UVLOT VCC > UVLOT
VCC
D4-D0
X X X VIDO Table VIDO Table VIDO Table VIDO Table VIDO Table VIDO Table VIDO Table VIDO Table
ENABLE
X X 0 1 1 1 1 1 1 1 1
BLKEN
X X X 0 0 0 0 1 1 1 1
X X X VS < 0.93VO 0.93VO < VS < 1.07VO 1.07VO < VS < 1.15VO VS > 1.15VO VS < 0.93VO 0.93VO < VS < 1.07VO 1.07VO < VS < 1.15VO VS > 1.15VO
VSENSE (VS)
Undefined LOW LOW VIDO Table 3 VIDO Table 3 VIDO Table 3 VIDO Table 3 VIDO Table 2 VIDO Table 2 VIDO Table 2 VIDO Table 2
VIDO (VO)
Undefined LOW LOW LOW HIGH LOW LOW LOW HIGH LOW LOW
PGOOD
Undefined LOW LOW LOW LOW LOW HIGH LOW LOW LOW HIGH
OVOUT
Table 2 - VIDO Output (BLKEN pulled high or left open)
D4
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D3
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
D2
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
D1
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
D0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
VIDO
0 0 0 0 0 0 0 0 0 0 1.800 1.850 1.900 1.950 2.000 2.050
D4
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D3
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
D2
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
D1
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
D0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
VIDO
2.00 2.10 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 3.10 3.20 3.30 3.40 3.50
Table 3 - VIDO Output (BLKEN pulled low)
D4
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D3
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
D2
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
D1
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
D0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
VIDO
1.300 1.350 1.400 1.450 1.500 1.550 1.600 1.650 1.700 1.750 1.800 1.850 1.900 1.950 2.000 2.050
D4
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D3
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
D2
1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
D1
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
D0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
VIDO
2.00 2.10 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 3.10 3.20 3.30 3.40 3.50
Table 4 - Mode Control
D4
X 0 1 0 1
ENABLE
0 1 1 1 1
BLKEN
X 0 0 1 1
Mode
Disable Low Normal Low Normal
State
VIDO is pulled low through 10k VIDO is scaled. Output 1.3V to 2.05V Normal Output 2.0 to 3.5V VIDO is scaled. Output 1.8V to 2.05V Normal output 2.0 to 3.5V
4
Copyright (c) 1997 Rev. 1.0 7/97
PRODUCT DATABOOK 1996/1997
LX1670
5 - B I T P R O G R A M M A B L E V O L TA G E R E F E R E N C E
P
RODUCTION
D
ATA
S
HEET
BLOCK DIAGRAM
BLKEN 6 BLOCK < 1.8V 4.67/4.47V 10.6/10.1V DAC
5
2V REF
14
VCC
D0 8 D1 9 D2 10 D3 11
ENABLE
D4B 13
VCC 0.87 * VS
4
OVOUT
1 D4 12 S 2X1 MUX
0
OUT
0.935 * VS
3
PGOOD
0.93 * VE GND 7 VE
1
VS
2
VSENSE
VIDO
FUNCTIONAL PIN DESCRIPTION
Pin Name
VIDO VSENSE PGOOD OV OUT ENABLE BLKEN GND D0 D1 D2 D3 D4 D4B VCC
Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Description
Output reference voltage used by PWM controller to set system voltage. Connected directly to system output voltage. Open collector output pulls low when the processor's supply is not good. SCR Driver goes high when processor supply is over voltage. TTL compatible chip enable. Internally pulled high. Enables or disables blocking of codes with voltage blow 1.8V for CPU protection. Internally pulled high. Analog ground return. LSB DAC logic control. Internally pulled high. 2nd LSB DAC logic control. Internally pulled high. 3rd LSB DAC logic control. Internally pulled high. MSB DAC logic control. Internally pulled high. Scales VIDO output when low. Internally pulled high. Inverting output of D4. Analog power supply.
Copyright (c) 1997 Rev. 1.0 7/97
5
PRODUCT DATABOOK 1996/1997
LX1670
5 - B I T P R O G R A M M A B L E V O L TA G E R E F E R E N C E
P
RODUCTION
D
ATA
S
HEET
THEORY OF OPERATION UNDER-VOLTAGE LOCKOUT This function keeps order to the IC until the power supply voltage reaches 85% of its nominal value. The output voltage is pulled low and PGOOD and OVOUT are pulled low. Once the power supply voltage crosses 85%, the output voltage, VIDO, is released, and P GOOD continues to be pulled low. When V SENSE (the microprocessor's power supply) is within 7% of VIDO, PGOOD is released. The comparator has hysteresis to prevent transient oscillation. 4-BIT DAC and 5th-BIT SCALER This function generates a precise voltage from a binary, 5-bit digital word VID [0:4]. It uses a 4-bit, binary weighted current DAC, driving a precise current to voltage converter. This voltage is then op-amp buffered and sent out. The scaling is accomplished by multiplexing the buffer op-amp. The resulting transfer function is: VIDO (D0,D1,D2,D3) = (2.00 + 0.1 * (1*D0 + 2*D1 + 4*D2 + 8*D3)) OVER- / UNDER-VOLTAGE COMPARATORS This function generates an open collector Power Good signal when VSENSE is within 7% of VIDO. OVER-VOLTAGE PROTECTION This function generates an OVOUT voltage signal when VSENSE is 15% higher than VIDO. This voltage can be used to drive an external SCR. CHIP ENABLE This function disables the chip when low. VIDO, PGOOD and OVOUT are all pulled low. When ENABLE is high, the chip's state is then determined by the other functions. BLANK ENABLE This function will disable VIDO for codes with voltages below 1.80V when this pin is high. When pulled low, this function will allow VIDO to accept codes for voltages of 1.30 to 3.50V.
for D4 = 1
VIDO (D0,D1,D2,D3) = (2.00 + 0.6 + 0.1 * (1*D0 + 2*D1 + 4*D2 + 8*D3)) * 0.5 for D4 = 0 for the code VIDO < 1.8V will be blocked and VIDO = 0. The zero-scale output voltage, full-scale output voltage and the scale factor are all trimmed on-chip using fusable links.
6
Copyright (c) 1997 Rev. 1.0 7/97
PRODUCT DATABOOK 1996/1997
LX1670
5 - B I T P R O G R A M M A B L E V O L TA G E R E F E R E N C E
P
RODUCTION
D
ATA
S
HEET
A P P L I C AT I O N I N F O R M AT I O N
See Note 1
D1 1N4148 D2 1N4148 F1 C20 0.1F R13 10 JP4 JP3 16A 32V C2 1500F 6.3V Q1 IRL3103 C11 1500F 6.3V JP1 JP2 12VIN 5VIN
See Note 1
R4 1K C10 0.1F C4 390F
1 2 3 4 5 6 7 8
VRM CONTROLLER
EN OTADJ SGND VVREF INV NINV/SS HICCUP CT VC1 TDRV PGND BDRV VCC SYNCEN CS+
16 15 14 13 12 11 10
C9 1F R7 10 C19 0.1F
See Note 1
L1 TOROID 5H Q2 IRL3103 R5 1K R6 1K Q3 2N6504 R1 5m C5 1500F 6.3V C12 1500F 6.3V C13 1500F 6.3V
LX1670
1 2 3 4 5 6 7
PWRGD OUTEN
VIDO VSENSE PGOOD OVOUT ENABLE BLKEN GND
VCC D4B D4 D3 D2 D1 D0
14 13 12 11 10 9 8
R2 10K VID4 VID3 VID2 VID1 VID0 C3 0.1F
R3 1K C7 0.1F
R8 10
CS- 9
C8 680pF
LX1661
C1 390pF
SUPPLY OUTPUT CLAMP
Note 1. Setup shown is for 5V application. For 12V input change the following: - Close JP1 and JP4 - Open JP2 and JP3 - For C2 and C11, use 16V/850F capacitors instead - Inductor L1 = 10H
FIGURE 1 -- LX1660/61 CONTROLLER USED WITH THE LX1670 PROGRAMMABLE REFERENCE/DAC CHIP FOR PENTIUM PRO PROCESSOR OR PENTIUM II PROCESSOR APPLICATIONS. GUARANTEED TO MEET INTEL SPECIFICATIONS.
Pentium is a registered trademark of Intel Corporation.
PRODUCTION DATA - Information contained in this document is proprietary to Linfinity, and is current as of publication date. This document may not be modified in any way without the express written consent of Linfinity. Product processing does not necessarily include testing of all parameters. Linfinity reserves the right to change the configuration and performance of the product and to discontinue product at any time.
Copyright (c) 1997 Rev. 1.0 7/97
7


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